Dr Abusaleh Jabir

DPhil (Oxon)

University Reader

School of Engineering, Computing and Mathematics


I am a University Reader with the School of Engineering, Computing, and Mathematics. I am highly active in innovative research and development. In addition to my research duties, I am also involved in teaching and course management, where I have the role of: 

  • Subject Coordinator for our Information Technology Management for Business degree.
  • Subject Expert and Faculty Liaison Manager for our Institutional Partnership Program with the Metropolitan College in Greece where we are running a program on Information Technology for Business.


I established the Advanced Reliable Computer Systems (ARCoS) reseasrch group several years ago, which I also lead. This self-sustaining group specialises in research and innovation in the design, tests, and verification of reliable and fault tolerant electronic hardware, with special focus on the emerging memristor based nanotechnology. Specifically in the memristor technology this group is working on reliable high density memory and sensor array design, low power high performance logic design, as well as neuromorphic and artificial neural network aspects of memristive devices.

I have done my doctoral (DPhil) degree in Computing from the University of Oxford. My research track record comprises more than 80 fully reviewed publications, best paper awards, book chapters, a number of patents, keynote paper, etc. I am also serving as member of program committee for IEEE conferences. 

My research interests include:

  • Reliable and fault tolerant hardware designs;
  • Electronic design automation, especially automatic CAD tools for hardware synthesis;  
  • Sensing and processing at the edge; 
  • Physical uncloneability in electronic hardware for authentication; 
  • Emerging technologies such as memristive devices.

I have carried out innovative research in a wide range of areas from Error and Attack Tolerant Electronic Hardware Designs to Automatic Synthesis and Optimisation of Electronic Hardware from its high level specs. In addition to publishing the results in premier journals and conferences, patents were also filed. Some of my filed and granted patents are listed below. 

  • Patent No. EU 17706875.6-1203. Memristive Multifunction Logic Architecture. Granted in September 2019. 
  • Patent No. number US 61/608,694 and GB 1114831.9. Cross Parity and BCH code based error tolerant electronic circuit design. Filed in March 2012 and August 2011. Now granted in various parts of the world, e.g as 10-201548 in South Korea.
  • Patent No. EU PCT/GB2007/004206. GfXpressTM: An Efficient Approach to Synthesis and Optimization of GF(2m) Polynomials in Hardware. Now granted in various parts of the world (Filed in October 2006).
  • Patent No. GB 1914221.5. Reconfigurable Memristive Architecture for Logic Operations and Process Variation Aware Sensing. Filed in October 2019.
  • Patent No. GB 1905392.5. A Lightweight Physically Uncloneable Memristive Architecture for Secure Backup and Authentication. Filed in April 2019.
  • Patent No. GB 1616837.9. Memristive Sensor Array. Filed in October 2016.

Further information about these inventions can be obtained from our Research and Business Development Office or by contacting me directly.

The Advanced Reliable Computer Systems Group

Our vision is to conceive innovative electronic circuits and systems, encompassing both mature and emerging technologies, with the objective of achieving much higher security, reliability, and efficiency than possible with the currently available systems. We believe that no single technology can satisfy these requirements on their own due to various shortcomings in each technology. For example, the existing technology landscape is dominated by the Metal Oxide Semiconductor Transistor (MOST) technology, which has well established itself as a highly scalable and power efficient technology. However, MOST is reaching its limits in scalability and various parasitic effects, including capacitance, as well as vulnerability to radiations and hardware attacks have become more prominent. Therefore, to achieve this we are committed to a complete rethink (with a possible paradigm shift) of the state-of-the-art for enhancing the currently achievable performances and capabilities by exploring ‘alternative’ and emerging technologies. Our vision is consistent with the requirements of the Internet of Things (IoT), Edge Computing, as well as cyber security and space explorations, where the requirements of secure, efficient, reliable and robust electronic systems are paramount. To this end, we are exploring various emerging devices such as memristors for ground-breaking applications in chemical sensing,  light-weight and highly resilient authentication and uncloneable hardware as well as sensing and processing at the edge, owing to their unique properties and numerous advantages.

This self-sustaining group has enjoyed research funding from various sources, e.g. the Ministry of Defence UK (MoD-CDE DSTL), the EPSRC, Finance South East.

The group comprises a number of PhD students, Research Associates, and collaborative partners and colleagues from both industries as well as other institutions.

My former PhD students, some of whom are also co-inventor of our patents, are employed in world leading Semiconductor Chip Design and Automotive Industries. Dr Adeyemo Adedotun, who completed his PhD with me in Reliable Memristive Arrays (Title: Design and Analysis of Memristor Based Reliable Crossbar Architectures), now works with Infineon Technologies, UK. Dr Mahesh Poolakkaprambil, who completed his PhD with me in Error Tolerant Electronic Hardware (Title: Multiple Bit Error Correcting Architectures Over Finite Fields), leads The Department of Microcontroller Series Development at Continental Teves AG & Co in Germany. 

Research projects

One of my current live projects is: MONITOR: A Self-Reparable Memristive Gas Sensor Array funded by the Leverhulme Trust, UK. This project is in collaboration with Dr Marco Ottavi and Dr Eugenio Martinelli with the University of Rome Tor Vergata, Italy. Here we are exploring the gas sensing properties of memristive devices and working on innovative self-repairable architectures for sensing multiple gases.



  • Design and Analysis of Memristor Based Reliable Crossbar Architectures
  • Design, Analysis and Testing of Memristive Logic and Authentication Architectures
  • Design, Test and Analysis of Error Tolerant Memristive Neural Networks
  • Error Tolerant Electronic Hardware Design
  • Finite Field Realization of Efficient and Fault Tolerant VLSI Structures for Cryptography
  • MONITOR: A self-repairable memristive gas sensor array


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